urn:nasa:pds:mess_grs_raw:data_edr:grs_adc2014246zzz_dat 1.0 1.10.1.0 Product_Observational 2018-06-08 1.0 PDS4 migrated product 2014-09-03T00:00:35.000Z 2014-09-03T23:59:35.000Z MESSENGER Mission urn:nasa:pds:context:investigation:mission.messenger data_to_investigation MESSENGER Spacecraft urn:nasa:pds:context:instrument_host:spacecraft.mess is_instrument_host Gamma Ray Spectrometer Instrument urn:nasa:pds:context:instrument:grs.mess is_instrument Mercury Planet urn:nasa:pds:context:target:planet.mercury data_to_target Mercury Orbit Year 4 2/052026434 2/052112774 grs_fpga pipe-grs2edr 1.0 grs_adc2014246zzz.dat 2014-09-04T14:47:32Z 0 1440 This table contains one set of FPGA ADC diagnostic information gathered by the MESSENGER Gamma-Ray Spectrometer (GRS). A set is defined as all data with MET timestamps corresponding to a given Earth day. Additional details are contained in the EDR SIS document. 31 0 64 met 1 1 UnsignedMSB4 4 Mission elapsed time in seconds. orbit_number 2 5 UnsignedMSB2 2 Orbit number is a unique identifier for a given orbit of the MESSENGER spacecraft around Mercury. Orbit number is defined as starting at apoherm and is calculated using the MET value and the appropriate SPICE kernels. Orbit numbering does not start until MESSENGER performs the Mercury orbit insertion. Until that time the value for orbit number is 0. power_register 3 7 UnsignedMSB2 2 The 2-byte integer contains the following bit fields: Bits - Name - Description 1 - ch1_latchup - ADC Channel 1 latchup. =0 no latchup. =1 latchup 2 - ch0_latchup - ADC Channel 0 latchup. =0 no latchup. =1 latchup 3 - pwr_ch1_inverted_adc - Channel 1 inverted power. =0 not inverted, =1 inverted 4 - pwr_ch0_inverted_adc - Channel 0 inverted power. =0 not inverted, =1 inverted 8 - fpga_reset_adc - Always reads 0. Write a 1 to reset FPGA 9 - adc_ch2_clock - ADC Channel 2 clock. =0 off, =1 on 10 - adc_ch1_clock - ADC Channel 1 clock. =0 off, =1 on 11 - adc_ch0_clock - ADC Channel 0 clock. =0 off, =1 on 12 - ch1_2_adc_power - Channel 1,2 ADC power. =0 power on, =1 power off 13 - ch1_reset_latchup - Channel 1,2 reset latchup. =0 normal, =1 reset latchup 14 - ch0_adc_power - Channel 0 ADC Power, =0 power on, =1 power off 15 - ch0_reset_latchup - Channel 0 reset latchup, =0 normal, =1 reset latchup 16 - power_sleep_adc - =0 normal operation, =1 sleep mode tap_register 4 9 UnsignedMSB2 2 The 2-byte integer contains the following bit fields: Bits - Name - Description 3 - use_zc_or_max_for_coin - =0 use zc0-zc1 for coincidence. =1 use max0-max1 for coincidence 4 - ch0_prefilter_flag - Channel 0 prefilter flag. =0 bypass input filter, =1 prefilter channel 0 5 - dither_mode_setting - =0 Immediate dither, =1 synchronized dither 6 - ch1_settle_retrig - Settling retriggered by Channel 1 trigger. =0 true, =1 false 7 - ch1_q_reset_disable_adc - Channel 1 charge reset does disable triggers. =0 false, =1 true 8 - ch0_q_reset_disable_adc - Channel 0 charge reset does disable triggers. =0 false, =1 true 9-12 - tap_ch1_adc - Channel 1 trigger tap 13-16 - tap_ch0_adc - Channel 0 trigger tap ch0_trigger_threshold 5 11 SignedMSB2 2 Channel 0 trigger threshold. ch1_trigger_threshold 6 13 SignedMSB2 2 Channel 1 trigger threshold. ch0_window 7 15 UnsignedMSB2 2 Channel 0 processing window. ch1_window 8 17 UnsignedMSB2 2 Channel 1 processing window. settle_adc 9 19 UnsignedMSB2 2 Settling time. dither_settle_adc 10 21 UnsignedMSB2 2 Dither settling time. dither_dac_cmd 11 23 UnsignedMSB2 2 Dither DAC command. gain_dac_cmd 12 25 UnsignedMSB2 2 Gain DAC command. status_register 13 27 UnsignedMSB2 2 This 2-byte integer contains the following bit fields: Bit - Name - Decription 1 - event_pending - =0 No events pending. =1 Event pending in FIFO 2 - reset_fifo_adc - Always reads 0. Write a 1 to reset buffer pointer logic 11 - ch1_in_range - =0 Channel 1 in range, =1 channel 1 out of range 12 - ch1_event_flag - =0 No channel 1 event occurred, =1 channel 1 event occurred 13 - test_pulse - =0 Not a test pulse event, =1 Test pulse event 14 - ch0_inverted_pulse - =0 Channel 0 is not an inverted pulse. =1 Inverted Channel 0 pulse event 15 - ch0_in_range - =0 Channel 0 in range. =1 Channel 0 out of range 16 - ch0_event_flag - =0 No channel 0 event occurred, =1 channel 0 event occurred trigger_per_sec_ch0 14 29 UnsignedMSB2 2 Channel 0 number of triggers per second. event_max_ch0 15 31 SignedMSB2 2 Channel 0 event max. event_min_ch0 16 33 SignedMSB2 2 Channel 0 event min. event_peak_ch0 17 35 SignedMSB2 2 Channel 0 event peak. trigger_per_sec_ch1 18 37 UnsignedMSB2 2 Channel 1 number of triggers per second. event_max_ch1 19 39 SignedMSB2 2 Channel 1 event max. event_min_ch1 20 41 SignedMSB2 2 Channel 1 event min. event_peak_ch1 21 43 SignedMSB2 2 Channel 1 event peak. delta_peak_time 22 45 SignedMSB2 2 Time of channel 0 peak - time of channel 1 peak (100 ns lsb). dead_time_adc 23 47 UnsignedMSB2 2 Dead time per second. (16 microseconds lsb). q_reset_adc 24 49 UnsignedMSB2 2 Channel 0 (Ge) charge resets per second. pmt_reset_adc 25 51 UnsignedMSB2 2 Channel 1 (PMT) charge resets per second. ch0_adc_test_port 26 53 SignedMSB2 2 Channel 0 ADC test port. HPGe raw data for debugging. ch1_adc_test_port 27 55 SignedMSB2 2 Channel 1 ADC test port. Shield raw data for debugging. ch2_adc_test_port 28 57 SignedMSB2 2 Channel 2 ADC test port. Microphonics raw data (actual time series data). test_pulse_register 29 59 UnsignedMSB2 2 This 2-byte integer contains the following bit fields: Bit 15 - test_pls_auto_cyc - Setting this bit will generate a 7.8 Hz pulse Bit 16 - test_pls_fire_adc - Any writing to this register will generate a 64 microsecond active low pulse delta_ch0_max_min 30 61 UnsignedMSB2 2 Time between Channel 0 max and Channel 0 min. diagnostic_adc 31 63 UnsignedMSB2 2 Diagnostic register. grs_adc2014246zzz.lbl 0 PDS3 Original PDS3 label Carriage-Return Line-Feed