120903211, 2008-06-02 14:09:52, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X00010033DF000000 " 120903215, 2008-06-02 14:09:56, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001004F48000000 " 120903218, 2008-06-02 14:09:59, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X00010047C0000000 " 120903221, 2008-06-02 14:10:02, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X000100495A000000 " 120903224, 2008-06-02 14:10:05, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001000236000000 " 120903234, 2008-06-02 14:10:15, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002394000000 " 120903238, 2008-06-02 14:10:19, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002594000000 " 120903241, 2008-06-02 14:10:22, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002794000000 " 120903244, 2008-06-02 14:10:25, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002994000000 " 120903248, 2008-06-02 14:10:29, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002B89000000 " 120903250, 2008-06-02 14:10:31, "CMD", 0, "0X90", "XRS_TEC_LEVEL ", "0X004000 " 120903261, 2008-06-02 14:10:42, "CMD", 0, "0X91", "XRS_TEC_MODE ", "0X00 " 120903261, 2008-06-02 14:10:42, "CMD", 0, "0X91", "XRS_TEC_MODE ", "0X00 " 120903285, 2008-06-02 14:11:06, "CMD", 0, "0X92", "XRS_TEC_POWER ", "0X01 " 120903285, 2008-06-02 14:11:06, "CMD", 0, "0X92", "XRS_TEC_POWER ", "0X01 " 120906316, 2008-06-02 15:01:37, "CMD", 0, "0X90", "XRS_TEC_LEVEL ", "0X008000 " 120906316, 2008-06-02 15:01:37, "CMD", 0, "0X90", "XRS_TEC_LEVEL ", "0X008000 " 120909850, 2008-06-02 16:00:31, "CMD", 0, "0X90", "XRS_TEC_LEVEL ", "0X00AB00 " 120909850, 2008-06-02 16:00:31, "CMD", 0, "0X90", "XRS_TEC_LEVEL ", "0X00AB00 " 120919405, 2008-06-02 18:39:46, "CMD", 0, "0X50", "XRS_HV_CONTROL ", "0X0000 " 120919405, 2008-06-02 18:39:46, "CMD", 0, "0X50", "XRS_HV_CONTROL ", "0X0000 " 120919626, 2008-06-02 18:43:27, "CMD", 0, "0X92", "XRS_TEC_POWER ", "0X00 " 120919638, 2008-06-02 18:43:39, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001004F2E000000 " 120919642, 2008-06-02 18:43:43, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X000100474B000000 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X06010002C8 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0X50", "XRS_HV_CONTROL ", "0X0005 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0X92", "XRS_TEC_POWER ", "0X00 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0000 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0100 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0200 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0X0D", "XRS_STAT_INT ", "0X003C " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0X11", "XRS_MAC_DELAY ", "0X003A " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X06010002C8 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0X50", "XRS_HV_CONTROL ", "0X0005 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0X92", "XRS_TEC_POWER ", "0X00 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0000 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0100 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0200 " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0X0D", "XRS_STAT_INT ", "0X003C " 120919645, 2008-06-02 18:43:46, "MAC", 0, "0X11", "XRS_MAC_DELAY ", "0X003A " 120919645, 2008-06-02 18:43:46, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001004914000000 " 120919648, 2008-06-02 18:43:49, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001000239000000 " 120919652, 2008-06-02 18:43:53, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002388000000 " 120919655, 2008-06-02 18:43:56, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002588000000 " 120919658, 2008-06-02 18:43:59, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002788000000 " 120919661, 2008-06-02 18:44:02, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002988000000 " 120919665, 2008-06-02 18:44:06, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002B85000000 " 120919665, 2008-06-02 18:44:06, "CMD", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002B85000000 " 120919672, 2008-06-02 18:44:13, "CMD", 0, "0X0B", "XRS_MEM_STR_READ ", "0X00 " 120919678, 2008-06-02 18:44:19, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X06010002C8 " 120919678, 2008-06-02 18:44:19, "MAC", 0, "0X50", "XRS_HV_CONTROL ", "0X0005 " 120919678, 2008-06-02 18:44:19, "MAC", 0, "0X92", "XRS_TEC_POWER ", "0X00 " 120919678, 2008-06-02 18:44:19, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0000 " 120919678, 2008-06-02 18:44:19, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0100 " 120919678, 2008-06-02 18:44:19, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0200 " 120919678, 2008-06-02 18:44:19, "MAC", 0, "0X0D", "XRS_STAT_INT ", "0X003C " 120919678, 2008-06-02 18:44:19, "MAC", 0, "0X11", "XRS_MAC_DELAY ", "0X003A " 120919679, 2008-06-02 18:44:20, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X06010002C8 " 120919679, 2008-06-02 18:44:20, "MAC", 0, "0X50", "XRS_HV_CONTROL ", "0X0005 " 120919679, 2008-06-02 18:44:20, "MAC", 0, "0X92", "XRS_TEC_POWER ", "0X00 " 120919679, 2008-06-02 18:44:20, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0000 " 120919679, 2008-06-02 18:44:20, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0100 " 120919679, 2008-06-02 18:44:20, "MAC", 0, "0XA0", "XRS_TLM_MODES ", "0X0200 " 120919679, 2008-06-02 18:44:20, "MAC", 0, "0X0D", "XRS_STAT_INT ", "0X003C " 120919679, 2008-06-02 18:44:20, "MAC", 0, "0X11", "XRS_MAC_DELAY ", "0X003A " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001000800 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002200 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001000A00 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002400 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001000C00 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002600 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001000E00 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002800 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X11", "XRS_MAC_DELAY ", "0X0002 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001000800 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002200 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001000A00 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002400 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001000C00 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002600 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001000E00 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0001002800 " 120919703, 2008-06-02 18:44:44, "MAC", 0, "0X11", "XRS_MAC_DELAY ", "0X0002 " 120919705, 2008-06-02 18:44:46, "MAC", 0, "0X80", "XRS_SEN_ANLG_PWR ", "0X0005 " 120919705, 2008-06-02 18:44:46, "MAC", 0, "0X0A", "XRS_MEM_STR_LOAD ", "0X0601000220 " 120919705, 2008-06-02 18:44:46, "MAC", 0, "0X20", "XRS_PWR_OFF ", "0X " 120919705, 2008-06-02 18:44:46, "MAC", 0, "0X15", "XRS_MAC_NEST ", "0X0B " 120919705, 2008-06-02 18:44:46, "MAC", 0, "0X0C", "XRS_MON_CNTRL ", "0X00 "