2001-11-19T19:04:53.000 \header System = GRS Author = mward Institution = UofAz Start_time = 11/19/01 17:30 Stop_time = 11/19/01 20:00 Send_time = Mon Nov 19 19:04:53 GMT 2001 \text Purpose: Change the GRS EEPROM sequence 8B to include the commands to turn on HEND high voltage when the sequence is called out in the background sequence just after Expected result: The GRS EEPROM sequence will be replaced Why it is needed: To enable HEND HV data collection for Aerobraking orbits Commands to be sent: /home/grs2001/software/SC_Commands/Post-MOI_1/bce_bfl/c01grs_s08b_hend_hv_on_1 3108, immediate, CHG_SEQ, 48, B-8, 4 0: immediate, CHG_HEND_STATUS, 3, ON, 0 1: + 0-1 , HEND_CMD, Triggering Logic, OR, 0, 0 2: + 0-2 , HEND_CMD, Triggering, C2 Allow, 32, 0 3: + 0-3 , HEND_CMD, Discriminator5 (Outer), 3, 0 2001-11-19T19:09:05.000 \header System = GRS Author = mward Institution = UofAz Start_time = 11/19/01 17:30 Stop_time = 11/19/01 20:00 Send_time = Mon Nov 19 19:09:05 GMT 2001 \text Purpose: Change the GRS EEPROM sequence 7B to a NoOp rather than turning off NS when the sequence is called out in the background sequence just before each Expected result: The GRS EEPROM sequence will be replaced Why it is needed: So that we will not be sending a bunch of commands for no reason Commands to be sent: /home/grs2001/software/SC_Commands/Post-MOI_1/bce_bfl/c01grs_s07b_noop_2.bfl 3107, immediate, CHG_SEQ, 12, B-7, 1 0: immediate, NO_OP, 0 2001-11-19T21:44:04.000 \header System = GRS Author = mward Institution = UofAz Start_time = 11/19/01 20:00 Stop_time = 11/19/01 23:00 Send_time = Mon Nov 19 21:44:04 GMT 2001 \text Purpose: To verify that GRS EEPROM sequences 7b and 8b are populated correctly with a Expected result: Expect to receive a dump of the contents of GRS EEPROM sequences 7b and 8b. Why it is needed: To ensure that the background seuence will autonomously turn on the HEND high Commands to be sent: /home/grs2001/software/SC_Commands/Post-MOI_1/bce_bcf/c01grs_dump_test_8.bcf 1157, immediate, DUMP_SEQ, 7, 1 1158, + 0-3 , DUMP_SEQ, 8, 1 1352, + 0-6 , DUMP_ANALOG 1353, + 0-9 , DUMP_PARAMS 1355, + 0-12 , DUMP_FPGA_REGS, 0 1356, + 0-15 , DUMP_FPGA_REGS, 1 1363, + 0-18 , DUMP_COUNTS